Secure Memory Systems

 Proven Leadership in Delivering Optimal Performance, Security & Capacity

 

The unique requirements of communications and networking applications such as low latency, small footprint, rigorous thermal specifications, and clean signal integrity, demand high-performance memory. Choosing the right technology for your design is a critical decision you make on the initial board layout; so is choosing the right component or device supplier to provide it.

To meet the increasing demand for high reliability, extreme performance in very small form factors requires advanced solutions. ISC8 works with industry semiconductor giants from both the memory and component side to meet the challenge for next generation devices at the same time proves that Moore's Law is alive by delivering patented 3D chip stacking products designed to meet the increasing demand for high-density semiconductor chipsets.

Innovative Design that Meets tomorrow's demands, Today.

• High-density memory products such as 288Mb and 576Mb QDR-SRAM,  and 8GB DDR3
• Memory products that deliver double or quadruple densities for existing monolithic memories while maintaining similar performance and footprint of the original component
• System-on-a-Chip (SoC) solutions consisting of ARM processor, Xilinx Virtex V5 FPGA, SDRAM, Flash and DDR
• Chip level Anti-Tamper (AT) detection and zerorization
• Custom homogeneous or heterogeneous mixed mode stacked dies
• Stacking of bare die or de-packaged die
• Custom packaging solutions for commercial, military and space applications

Unique Stacking and Packaging Know-How:

• Proven and patented stacking solutions since 1974
• 100% US based production for secure and government applications
• Support for Classified Programs
• Smallest stacked components
• Power dissipation techniques
• Stacked components that maintain the same performance as the monolithic counterpart
• Small to medium volume production

We understand a "one size fits all" approach doesn't work. ISC8 provides custom solutions that give you the ability to mix and match components to create a systems-in-package design that meets your specific needs.

Advantages of 3D Chip Stacking

ISC8's patented technology enables stacking and interconnecting electronic devices in one single highly miniaturized package with no limitation for the merging of heterogeneous technology and form factors.

Electronic components used in today's devices require lower power operation and reduced feature size.  Military customers require high interconnectivity between processors and memories that operate in a small footprint.  ISC8's 3D Stacking of components supports these needs.

• Reduced board space
• Reduced Interconnectivity
• Lower operational power
• Lower interface latency
• Ability to mix various die types in a single device

3D Stacking enables the mixing of dissimilar process technologies such as high-speed Synchronous Dynamic Random Access Memory (SDRAM) and Complementary Metal-Oxide-Semiconductor (CMOS). 3D Stacking is a means to avoid the "Memory Wall", that is, how to get the most memory as close to the processor as possible. These are critical problems found in today's high speed network and communication devices and systems and is driving the increasing need towards aggressive highly-parallel architectures.

Quad Data Rate (QDR) & Double-Data Rate (DDR) Stacked Products

ISC8 has been an industry leader for over 40 years in 3D stacking solutions

ISC8 3D stacked chips are capable of operation as a single unified device at the same time providing similar performance and increased operational density, especially for  memory components.  Our solutions support the stacking of heterogeneous memory 2 to 4+ in height that usually fit within the same footprint as the monolithic. Additionally, we support word widths form 8bit to 256 bits and higher within the device.   ISC8's 3D packages are able to fill the gap between monolithic generations of memory devices. We work with semiconductor manufacturers to fill the gap in the marketplace until the next generations of devices become available. We aim to be the supplier to take existing technologies and supercharge them in coordination with our partners.

Maximum Package Size 2D+ 40 x 40 x 40 (mm)

Maximum Package Size 3D 17 x 17 x 3 (mm)

Clock speed 500 MHz clock / 4 phase (2 GHz chip operation)

Operational Temperature Range 0 ͦ to 80 ͦ C

3D Packaging Capabilities

• Stacked Die (homogeneous and heterogeneous)
• Layers 2-128
• Layer thickness 0.05 to 0.2 mm
• Reduction in weight and size of system with enhanced electrical performance through shorter die-to-die interconnects
• Ability to intermix die types into a single structure (e.g. processor and support memory integrated into a single stack)
• Stacked memory devices in the same pad layout as monolithic package
• Fill the gap between monolithic generations of memory devices
• Layer-to-layer interconnection achieved by area array or side bussing interconnects based on customer requirements
• Option to embed discretes to enhance electrical performance

ISC8 has over 150 patents issued or pending supporting the stacking and packaging of our products.  We are constantly innovating new designs to support future processing and memory stack needs via United States government funded research and development.